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Power Sequencing

Power Sequencing Tailored for Unique Systems

Successfully powering up a system can be tricky. So can powering one off. Timing, order of events, and power levels need to be just right for proper system functionality and stability. Power sequencing can also prevent unnecessary current draw while portions of the design sit idle, waiting for prerequisite systems to be powered. Some FPGAs may require more than ten rails, which if sequenced using discrete components, could introduce extra power and board space overhead.

Demo Board Power Sequencing Design in GreenPAK 5

Using Silego’s GreenPAK™ family of devices, it is easy to implement custom power sequencing designs in an extremely small area, using minimal power and board space. When paired with the tiny, ultra-low RDSON GreenFET™ Integrated Power Switch, power sequencing with Silego is an incredibly efficient solution.

Often in various combinations in a single system, some common methods for power sequencing include:

  • Fixed timing
  • Power Good
  • I2C Acknowledge
  • Voltage Sensing

GreenPAK Benefits for Power Sequencing

  • System Stability
    • GreenPAK is Zero Code - Implementing features in hardware ensures stability
    • GreenPAK can integrate many components ensuring fewer points of failure
  • Power Consumption
    • GreenPAK is low-power - Can operate continuously without ruining power budget
  • Size
    • GreenPAK is as small as 1.2 mm²
  • Flexibility
    • GreenPAK GPIO are configurable - Pull-up/down resistors, Push-Pull, Open drain, etc.
    • GreenPAK GPIO routing is flexible – Ensuring the least complexity in PCB routing
    • GreenPAK integrates many common components – Generate custom timing and logic to fit the requirements of many power sequencing designs

Fixed Delay Sequencing

Example 1. Fixed Delay Sequencing

One method for sequencing multiple sub-systems is to allot a fixed amount of time for each start-up sequence. This is appropriate for systems which do not feature a Power Good signal. Finding a discrete solution with the exact delay timings needed can take hours, but with GreenPAK’s configurable logic and timing resources, developing a custom system is easy.

Key Design Considerations
  • Delay Time – Using GreenPAK’s internal oscillators and CNT/DLY blocks, it is possible to address a wide range of timing requirements
  • ON Signal Polarity – GreenPAK can be configured to output active high or low using integrated inverters and LUTs
Example 1. Timing Diagram Example 1. GreenPAK Implementation

Power Good

Example 2. Sequencing with Power Good

Many ICs have the ability to produce a Power Good (PG) signal once the respective systems have finished their start-up routine. This can be useful in systems where start-up time is not fixed and may depend on multiple variables.

Key Design Considerations
  • ON and PG Signal Polarity – GreenPAK can be configured to output active high or low using integrated inverters and LUTs.
Example 2. Timing Diagram Example 2. GreenPAK Implementation

I2C Acknowledge

Example 3. Power Sequencing with I2C Acknowledge

Another option in programmable systems with I2C is to send a command to the power sequencer, in this case GreenPAK, to let it know start-up was completed successfully. Using GreenPAK's I2C virtual inputs, it is easy to treat an I2C command just like a digital Power Good signal.

Key Design Considerations
  • I2C Speed – GreenPAK I2C supports up to 400 kHz
  • I2C Address – GreenPAK can have up to 16 unique I2C addresses
Example 3. Timing Diagram Example 3. GreenPAK Implementation

Voltage Sensing

Example 4. Power Sequencing with Voltage Sensing

To ensure system stability, many SOCs, DSPs, and FPGAs require a minimum voltage for startup. Monitoring the power level of a rail can be done simply using GreenPAK’s configurable analog comparators.

Key Design Considerations
  • Over-voltage/Under-voltage Threshold – Supply tolerances vary, but using GreenPAK with integrated ACMPs enables reliable sequencing over a wide range of user specified conditions
  • Time Sensitive Voltage Limits – Varying periods of voltages outside the limit may be tolerable for some systems. GreenPAK’s configurable CNT/DLY blocks can be used to reject reset events below a wide range of time thresholds
  • Hysteresis – Nominal voltage requirements may incorporate hysteresis. GreenPAK’s ACMPs can be configured with 25, 50, or 200 mV hysteresis
Example 4. Timing Diagram Example 4. GreenPAK Implementation
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