Media Coverage

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Jun 9, 2017

Silego introduces next GreenPAK LDO for wearable and handheld markets

Silego Technology has added the SLG46580 with four 150mA low drop out (LDO) regulators to its GreenPAK family based on its Programmable Mixed-signal Integrated Circuit (PMIC) architecture.

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Jun 6, 2017

Silego adds LDOs to configurable chips to advance “Flexible Power Islands”

With its SLG46580, Silego Technology (Santa Clara, California) has added four, 150 mA low-dropout linear regulators to its GreenPAK programmable mixed-signal device range. The part can be configured to provide complex power management functions to sections of circuitry within an overall design; hence, “Flexible Power Islands”.

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May 25, 2017

Avnet Named Exclusive Global Distributor for Silego Technology

Strategic engagement will accelerate adoption of groundbreaking Configurable Mixed-signal IC technology.

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May 19, 2017

Webinar: Basics of Motor Control

This webinar is a beginner’s course to help system designers understand the fundamentals of motor control circuitry and common control schemes. Implementation of haptic motor control circuits will be demonstrated in a GreenPAK CMIC, and the power and space saving advantages of this implementation will be discussed.

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Apr 20, 2017

Power Systems Design for Wearables: Life’s No PMIC Q&A with Silego Technology

Considering an approach to power management that could re-invigorate wearables.

By Anne Fisher, Managing Editor

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Apr 3, 2017

Configurable Mixed-signal ICs and Asynchronous State Machines Can Optimize Embedded Designs

SoC and MCUs require external circuitry for power management, human interface or connecting to sensors. As a result, there are almost always comparators, op amps, level shifters, various logic and discrete transistors scattered across a design. These SoCs are almost never truly Systems on a Chip.

In some cases, the support logic needed can be swept up into a low-end FPGA. But usually this is not a cost saving over discrete components. It is also an inadequate solution since an FPGA cannot address analog or discrete components. For an embedded device, this challenge will be even more pronounced as an MCU or SoC cannot address all the possible sensor, power, and connectivity options.

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Mar 27, 2017

Silego Announces GFET3 Integrated Power Switches in Wafer Level Chip Scale Packaging

Unlike other load switch products on the market in Wafer Level Chip Scale Package (WLCSP), Silego combines its world-class FET IP and system-level protection features in announcing three new, low RDSON feature-rich Integrated Power Switches.

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Mar 13, 2017

Switches cover up to 4A high-side power control apps

The devices offer nFET and pFET low RDSON performance, minimising thermal gradients in medium-current applications, according to Silego.

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Mar 6, 2017

Brain-boggler at ESC Boston 2017

Well, earlier today, Nathan and I had a very interesting conversation regarding the way in which one might implement GPAK-based neurons and connect them together to form the brain. I don’t want to say too much at the moment because our ideas are still in flux. What I will say is that we're envisaging each neuron being implemented as a small round circuit board as illustrated below.

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Feb 6, 2017

Power Systems Design for Wearables: Life’s No PMIC – Q&A with Silego Technology

By Anne Fisher, Managing Editor at EECatalog.
Considering an approach to power management that could re-invigorate wearables.

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