Mixed Signal and
Analog Silicon Building Blocks
Silego Semiconductor
Press and News
Silego rolls out lowest power, highest performance DDR3 register clock roadmap of products

Santa Clara - April 4, 2006 - SILEGO Technology introduces the SLGSSTE32882 family of JEDEC compliant Registering Clock Driver products which support the industry’s latest DDR-3 based Registered Dual In-Line Memory Modules (RDIMM) for advanced server and workstation applications. Silego’s Registering Clock Drivers combine PLL and Buffer Register into a single 1.5V/1.2V power saving device supporting DDR-3 operating speeds of 800 MHz, 1066 MHz, 1333 MHz and 1600 MHz. Extensive performance enhancing features are embodied into the SLGSSTE32866 family to extend design margins and significantly broaden application scenarios. The SLGSSTE32866 family of devices is packaged in low profile 176 ball BGAs.

 

<< Back