AN-1150 Auto-ranging I2C Capacitance Meter

Capacitance is commonly measured by forming an RC oscillating circuit using the capacitive element being measured, as shown in Figure 1. A logic inverter is used to sequentially charge and discharge the capacitor, and the oscillator’s frequency is inversely proportional to the capacitance being measured. In order to measure the oscillator’s frequency, the oscillator signal is fed a counter. The frequency is calculated based on the amount of time it takes to accumulate a fixed number of pulses.

An RC oscillator circuit with inverter

Figure 1. An RC oscillator circuit with inverter

There are limits to the range of frequencies that this arrangement can measure. The lowest measurable frequency is reached when the reference timer overflows before the pulse counter can overflow. The highest measurable frequency is reached when the reference timer ticks only once before the pulse counter overflows.

The RC oscillator with 5 ranges implemented with the Silego SLG46538M

Figure 2. The RC oscillator with 5 ranges implemented with the Silego SLG46538M

Nevertheless, since the RC oscillator frequency is also inversely proportional to the external resistance R, the range of measurable capacitance may be expanded by switching between multiple resistance values. For high capacitance, a lower value resistor can be used to keep the frequency above the lower frequency boundary. Likewise, for low capacitance, a higher value resistor can be used to keep the frequency below the upper frequency boundary. In this example case, five ranges of capacitance are implemented using five external resistors, as shown in Figure 2. Note that the inverter component could have been implemented inside the GreenPAK™; however, significant coupling between the system’s input and output pins was observed, and so the capacitor voltage had to be buffered by an external inverter.

Table 1 lists the resistor values for each measurement range. For the most part, they are separated by a factor of 10. This ratio can be increased to widen the measurement ranges. Practically speaking, the lower limit on the resistor values is determined by the maximum current on each of the GreenPAK™ IC’s output pins, and the upper limit on the resistor values is determined by the capacitor leakage current and inverter gate input leakage current.

Resistor Value
R0 470Ω
R1 10kΩ
R2 100kΩ
R3 1MΩ
R4 1MΩ

 

Table 1. Resistor values used for each range of capacitance

Capacitance measurements can be resource-intensive for a microcontroller.

A counter is needed to accumulate pulses from the RC oscillator, and a reference timer is needed to measure the time needed to accumulate pulses. GPIO pins are required to manage the various external resistors used to implement multiple measurement ranges.

The counter must be polled (or interrupt routines must be used) to catch the moment of its overflow. Using a GreenPAK™ IC can free all of these resources and automate all of the multi-range functionality.

Autoranging/Measurement Circuit

Figure 3 depicts the capacitance measurement and auto-ranging logic implemented inside the GreenPAK™ IC. At the heart of the internal circuitry are two counters: CNT0, and CNT1. CNT0 is clocked by the external RC oscillator and accumulates N pulses before overflowing. CNT1 is clocked by OSC0 and increments at a fixed frequency (3.125kHz). Ideally, during a measurement, CNT0 would overflow first, freezing CNT1, whose contents could be read over the I2C bus and then used to calculate the external RC oscillator’s frequency. If CNT1 overflows before CNT0, then the frequency of the external RC oscillator is too slow and may be increased by switching to a lower value resistor.

GreenPAK5 internal connections

Figure 3. GreenPAK™ internal connections

The asynchronous state machine is used to keep track of which resistor is being used in the external RC oscillator and activates/deactivates the appropriate GPIOs used to drive this oscillator. As shown in Figure 4 below, there are five states used, one for each measurement range. Each state activates an output pin corresponding to a different external resistor.

ASM state diagram

Figure 4. ASM state diagram

Flip flop DFF7 is set when a valid measurement is taken. This is determined by 3-bit LUT1, which monitors when CNT0 overflows before CNT1. DFF7’s output, “Data ready,” freezes counters CNT0 and CNT1 as well as sets pin 16 to signal the microcontroller that measurement is complete. 3-bit LUT5 monitors when CNT1 overflows before CNT0 and sets the signal “Range down.” This signal is fed to the ASM to decrement the range/resistor selected.

Without flip flops DFF3 and DFF6, the ASM could not be directly triggered by the signal “Range down” because the ASM is asynchronously level-triggered, not edge triggered. A digital high on “Range down” would sequentially trigger the transition from one range to another until the lowest range is reached. For example, when Range 4 decrements to Range 3, nothing will prevent the ASM from continuing to decrement the range all the way down to Range 0, since the “Range down” signal is still high. With DFF3 and DFF6, a positive edge on “Range down” triggers only a single transition from an even-numbered range to an odd-numbered range or vice-versa. No consecutive states share a common transition signal, since there is one signal for the odd states (DFF3’s output) and one signal for the even states (DFF6’s output).

Here is the sequence of events that occurs during a measurement:

  • A negative edge is externally applied to pin 2, which momentarily brings the “nReset all” signal low, the “Reset measurement” signal high, and the “nReset measurement” signal low.
  • This resets the ASM, CNT0, CNT1, DFF7, DFF3, DFF6, and OSC0. The ASM starts out in the “Range 4” state.
  • “Data ready” goes low.
  • With “Data ready” low, the 2-bit LUT1 turns on the external RC oscillator.
  • The counters begin to increment.
  • If CNT0 overflows before CNT1:

○ A positive edge from 3-bit LUT1 clocks DFF7, setting the “Data ready” signal.

○ The “Data ready” signal freezes CNT0 and CNT1 and sets output pin 16 high to notify the microcontroller that data is available on the I2C bus.

○ The microcontroller can read the contents of CNT1 and the current state of the ASM at any time after pin 16 is set.

  • If CNT1 overflows before CNT0:

○ A positive edge from 3-bit LUT5 clocks DFF3 and DFF6, which cause the ASM to change state and decrement the measurement range.

○ The ASM sets or resets the “Range odd” signal, and edge detect EDGE DET0 momentarily activates the signal “Reset measurement,” which resets counter CNT0 and CNT1.

  • If CNT1 overflows before CNT0, and the ASM is in the state “Range 0”:

○ A positive edge from 3-bit LUT1 clocks DFF7 as if a valid measurement was made, setting the “Data ready” signal.

○ As in the case when CNT0 overflows before CNT1, the “Data ready” signal freezes CNT0 and CNT1 and sets output pin 16 high to notify the microcontroller that data is available on the I2C bus.

○ The microcontroller can read the contents of CNT1 and the current state of the ASM at any time after pin 16 is set.

Design Equations

The frequency of the external RC oscillator is determined by the resistor and capacitance, but also by the digital high/low thresholds. If a Schmitt trigger is used on the external inverter, then the frequency can be derived as:

Schmitt trigger capacitance

Derivative1 Derivative2

ΔVcap = Net voltage change during one RC oscillator tick = 2 * digital high/low voltage gap

Δt = Period of the RC oscillator

 RC oscillator frequency

fRC = RC oscillator frequency

Rext = RC resistor value

Cext = RC capacitance value, the capacitance being measured

VSchmitt,high = Schmitt trigger digital high threshold

VSchmitt,low = Schmitt trigger digital low threshold

Vcap,avg = Average capacitor voltage = VDD / 2

K = proportionality constant = Constant

The relationship between the external capacitance to the CNT1 counted value is:

The relationship between the external capacitance to the CNT1 The relationship between the external capacitance to the CNT1

XCNT1 = CNT1 counted value accumulated during one period of CNT0 + 1

fCNT1 = CNT1 tick frequency = 3.124kHz

NCNT0 = CNT0 maximum value (overflow/modulo value) + 1

The maximum capacitance measurable by any given range is:

The maximum capacitance

Cext,max = maximum capacitance measurable by a range with external resistance Rext

NCNT1 = CNT1 maximum value (overflow value) + 1

Since Cext,max is proportional to NCNT1, higher values of NCNT1 mean that higher capacitances can be measured. However, there is a tradeoff between higher measurable capacitance values and longer measurement acquisition times. Since the circuit starts out in the lowest of five capacitance ranges, CNT1 must overflow four times to reach the highest measurement range, which means that the longest possible measurement acquisition time is:

The longest possible measurement acquisition time

Cext,max is inversely proportional to NCNT0, which means that minimizing NCNT0 will increase the maximum measurable capacitance. However, jitter in the RC oscillator frequency means that a smaller group of ticks will have a greater percentage of variability than a larger group of ticks.

External RC oscillator, with capacitor current and voltage indicated

Figure 5. External RC oscillator, with capacitor current and voltage indicated

This is compounded by the fact that at the beginning of the measurement, the state of charge of the capacitor is unknown, making the length of the first tick variable (though the longer the time between measurements, the closer the capacitor voltage will be to 0V or VDD). Overall, this means that accuracy is improved by increasing NCNT0.

Finally, Cext,max is also bounded by the maximum capacitor charge/discharge current. The output pins of the SLG46538M can source at least 41mA and sink at least 14mA. Therefore, the highest frequency external resistor should not have a value below 5V/14mA = 360Ω.

Table 2 gives the maximum capacitance values measurable by each range.

Range Rext Cext,max
0 470Ω 130μF
1 10kΩ 6μF
2 100kΩ 600nF
3 1MΩ 60nF
4 10MΩ 6nF

 

Table 2. Maximum capacitance measurable by each range
VSchmitt,max = 4.64, VSchmitt,min = 2.00, K = 0.47, NCNT1 = 3125, NCNT0 = 9
Measurement time = 1s/range

Results

Various discrete capacitors were measured using a multimeter and using the GreenPAK™ circuit. Figure 6 shows a graph of CNT1 contents versus measured capacitance for each range. As expected, each range shows a linear relationship between the CNT1 value and measured external capacitance.

Autoranging capacitance meter test results

Figure 6. Autoranging capacitance meter test results

For the microcontroller, measuring capacitance with this circuit is as simple as reading the contents of CNT1 (registers 0xEE and 0xEF) and the states of the ASM outputs (register 0xF5) over the I2C bus. Given the states of the ASM outputs, the measurement range can be deduced, since the ASM outputs activate the pins connected to the external resistors.

Once the range and CNT1 value are known, the capacitance can be calculated using the linear relationships depicted in Figure 5.

If the measurement range needs to be expanded, the microcontroller can change NCNT0 and NCNT1 (the maximum/overflow values of CNT0 and CNT1) by writing to registers 0xC5 through 0xC6 for CNT0 and registers 0xC7 through 0xC8 for CNT1.

Conclusion

This application note has demonstrated how to configure a GreenPAK™ mixed signal IC to build an auto-ranging capacitance meter. This frees several of the microcontroller’s resources, including several GPIO pins, a counter, a timer, compute cycles, and possibly some interrupt routines. It makes capacitance measurement as simple as reading values over an I2C bus.

Appendix A

2-bit LUT2 properties 3-bit LUT1 properties 3-bit LUT5 properties

2-bit LUT2 properties

3-bit LUT1 properties

3-bit LUT5 properties

About the Author

Name: Matthew Dion

Background: Matthew Dion graduated with a degree in chemical engineering. He co-founded a company that designs and manufactures scientific instrumentation, where he is in charge of the embedded computing and hardware design.

Contact: appnotes@silego.com

 

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